Firmware distinguishes individual flash die through four logical values: bus, chip enable, lane, and die. There are two 32 bit data busses (bus 0 and bus 1). Bus 0 corresponds to quads 0 . Bus 1 corresponds to quads 1. A bus is composed of four data lanes. The 8 bit IOs (or lanes) of each of the four flash devices in a quad are aggregated to form a 32 bit bus. Each bus is associated with up to eight logical chip enables (CE 0 to 7). The logical chip enables rarely correspond to the physical hardware chip enable signals. The die refers to the individual flash die selected by a single chip enable. When there is one die for each chip enable in a flash package, this value will always be 0. If there are two flash die for a single chip enable, the value will either be 0 or 1. This value is not used for identifying flash packages, as it distinguishes individual die within a single package.
Physical flash devices are distinguished by their signal connections, namely their chip enable and data signals. There are 16 physical chip enable signals (CEN_0 to CEN_15) and 16 physical flash data busses (FLASH_B0 to FLASH_B15). These physical signals are mapped to different logical flash addresses depending on the type of flash used and the topography of the drive.